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CARLOS BERNARDINO SILVA CARDENAS

CARLOS BERNARDINO SILVA CARDENAS

CARLOS BERNARDINO SILVA CARDENAS

DOCTOR EN INFORMATICA, UNIVERSIDAD AUTONOMA DE BARCELONA

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MÁSTER EN MICROELECRÓNICA: DISSENY DE CIRCUITS INTEGRATS. (UNIVERSIDAD AUTONOMA DE BARCELONA)

DOCENTE ORDINARIO - PRINCIPAL
Docente a tiempo completo (DTC)
Departamento Académico de Ingeniería - Sección Electricidad y Electrónica

Publicaciones

Se encontraron 89 publicaciones

BARBA, R. G.; Criollo, M.; Aimacaña, N.; Manosalvas, C.; SILVA, C. B.(2019). QoS policies to improve performance in Academic Campus and SDN Networks. En 10TH IEEE Latin-American Conference on Communications (LATINCOM2018). (pp. 60 - 65). GUADALAJARA. IEEE. Recuperado de: https://whova.com/embedded/subsession/ieeel_201811/482089/482157/
LUIS, C. J.; CANO, C. E.; SILVA, C. B.(2018). A high-efficient architecture for calculating the determinant in the N-FINDR algorithm on hyperspectral image processing. En XXIV WORKSHOP IBERCHIP. (pp. 1 - 4). PUERTO VALLARTA. IBERCHIP.
PLASENCIA, F. P.; MITACC, E. M.; RAFFO, M. A.; SILVA, C. B.(2018). UVM-Based Functional Verification Framework for an AES Encryption Module. En 2018 19th IEEE Latin American Test Symposium (LATS). (pp. 1 - 4). IEEE. Recuperado de: https://ieeexplore.ieee.org/document/8349672/
PLASENCIA, F. P.; MITACC, E. M.; RAFFO , M. A.; SILVA, C. B.(2018). Robust functional verification framework based in uvm applied to an aes encryption module. En 2018 New Generation of CAS (NGCAS). (pp. 1 - 4). VALLETA. IEEE.
CHAUDHRY, H.; VILLEGAS, E. C.; RAFFO, M. A.; SILVA, C. B.(2018). Motion Vector Prediction and Search Range Calculation Architecture for HEVC Motion Estimation. En XXIV WORKSHOP IBERCHIP 2018. IBERCHIP.
CHAUDHRY, H.; VILLEGAS, E. C.; RAFFO , M. A.; SILVA, C. B.(2018). Motion Vector Prediction and Search Range Calculation Architecture for HEVC Motion Estimation. En XXIV WORKSHOP IBERCHIP. (pp. 1 - 4). PUERTO VALLARTA. IBERCHIP. Recuperado de: https://www-elec.inaoep.mx/~LASCAS18/index.php
PLASENCIA, F. P.; MITACC, E. M.; RAFFO , M. A.; SILVA, C. B.(2018). Alternative functional verification methodology for low and medium level designs (Applied to an AES encryption module). En 2018 IEEE 19th Latin-American Test Symposium (LATS). (pp. 1 - 4). SAO PAULO. IEEE.
SIMANCAS, J. L.; SILVA, C. B.; RAMIREZ, E.; SANCHEZ, R.; CAMA, A.(2017). Comparative analysis with pedagogical purposes in the design of narrowband suppressor filters with twin-T. Espacios (Caracas). Volumen: 38. (pp. 36 - 48).