LUIS, C. J.;
CANO, C. E.;
SILVA, C. B.(2018).
A high-efficient architecture for calculating the determinant in the N-FINDR algorithm on hyperspectral image processing. En
XXIV WORKSHOP IBERCHIP. (pp. 1 - 4). PUERTO VALLARTA. IBERCHIP.
PLASENCIA, F. P.; MITACC, E. M.; RAFFO , M. A.;
SILVA, C. B.(2018).
Robust functional verification framework based in uvm applied to an aes encryption module. En
2018 New Generation of CAS (NGCAS). (pp. 1 - 4). VALLETA. IEEE.
SIMANCAS, J. L.;
SILVA, C. B.; RAMIREZ, E.; SANCHEZ, R.; CAMA, A.(2017).
Comparative analysis with pedagogical purposes in the design of narrowband suppressor filters with twin-T. Espacios (Caracas). Volumen: 38. (pp. 36 - 48).
VIVAS, J. M.;
SILVA, C. B.; MUÑOZ, J. L.(2017).
Implementation and Testing of IPv6 Transition Mechanisms. En
9th Latin-American Conference on Communications (LATINCOM 2017). (pp. 123 - 126). GUATEMALA. IEEExplorer.
BEJAR, E. A. M.;
SALDAÑA, J. C.; RAYGADA, E. L.;
SILVA, C. B.(2017).
On the jitter-to-fast-clock-period ratio in oscillator-based true random number generators. En
2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS). (pp. 243 - 246). WASHINGTON D. C.. IEEExploreDIGITAL.
SALDAÑA, J. C.;
SILVA, C. B.; DEL MORAL, E.(2016).
A CMOS Implementation of the Discrete Time Nonlinear Energy Operator Based on a Transconductor-Squarer Circuit. En
VII IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS. (pp. 395 - 398). FLORIANOPOLIS. UNIVERSIDAD FEDERAL SANTA CATARINA. Recuperado de:
http://gse.ufsc.br/lascas2016/ SOTO, J. G. M.;
SILVA, C. B.; VILLEGAS, E. C.(2016).
A High Parallel HEVC Fractional Motion Estimation Architecture. En
2016 IEEE Andescon Andean Council International Conference. (pp. 36 - 39). LIMA. DIGITAL. Recuperado de:
www.andescon.org
