CARLOS BERNARDINO SILVA CARDENAS

, h. j. y silva, c. b. (2012). A digital hardware architecture for a three-input one-output zero-order ANFIS. En 3rd. IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS; LASCAS2012 (pp. 75-78). puebla: INAOE-PUEBLA. Recuperado de http://www-elec.inaoep.mx/~LASCAS12/index.html

, e. c.; raffo, m. a. y silva, c. b. (2011). A Fractional Motion Estimation Hardware Architecture with Quarter-Pixel Accuaracy according to H.264/AVC for HDTV video sequences at real-time processing. En Conference on Electronics, Telecommunications and Computers , 2011. CETC2011. Recuperado de http://www.deetc.isel.pt/cetc11/

, f.; ceratti, a.; prestes, d.; pinto, a.; bolzani, l.; vargas, f.; montez, c.; hernandez, f.; gatti, e. y silva, c. b. (2012). A Transmission Power Self-Optimization Technique for Wireless Sensor Networks. International Scholarly Research Network ISRN Communications and Networking ,, Volume 2012 (Article ID 720286), pp. 1-12. Recuperado de http://www.hindawi.com/isrn/cn/